In ARM CPU architecture, we can mask IRQ, FIQ interrupts by setting the I and F bits of CPSR. But I don’t find any way to mask other exceptions such as reset, undefined instruction, supervisor call, prefetch abort, data abort. Does that mean these exceptions cannot be disabled?
Related
Interrupts are hardware based and happen asynchronous (data incoming to a socket, some I/O is ready to read from or write to, A user pressed the keyboard.
Exceptions are are also hardware based but they are synchronous and caused by the CPU when executing instructions. for example a page in the virtual memory address space that has no actual chunk of RAM mapped to it will cause a page fault. Exceptions are the general name for fault, trap and abort.
Interrupts and Exceptions are generated by hardware and handled by handlers in the kernel space. They can be seen as mean of communication between the Hardware and the kernel.
Signals Signals can be viewed as a mean of communication between the running processes and the kernel. In some cases an Interrupt/Exception will use signals as part of the handling by the kernel.
Interrupts
In computing, an interrupt is an asynchronous signal indicating the
need for attention or a synchronous event in software indicating the
need for a change in execution.
(definition obtained from stackoverflow's tag description)
So, it's not unnecessarily asynchronous. It's asynchronous only if it is emitted by the hardware. Think of a virtual device or an emulator for examples of synchronous interrupts, when you are programming a camera and instead of the real device you have an emulator, which you can program to simulate interrupts.
Exceptions
From Microsoft docs:
Most of the standard exceptions recognized by the operating system are
hardware-defined exceptions. Windows recognizes a few low-level
software exceptions, but these are usually best handled by the
operating system.
Windows maps the hardware errors of different processors to the
exception codes in this section. In some cases, a processor may
generate only a subset of these exceptions. Windows preprocesses
information about the exception and issues the appropriate exception
code.
Exceptions are not necessarily hardware-generated and not necessarily synchronous.
If they are synchronous, then a software emitted it (like a camera emulator). Asynchronous exceptions can be raised just about anywhere.
In more advanced programming languages one can use exception handlers and different kinds of exceptions have their own exception subclass. The program can emit an exception with a command, usually the throw keyword which is paired with an exception instance. See: https://www.geeksforgeeks.org/throw-throws-java/
One can implement custom exception classes according to business logic, see https://www.baeldung.com/java-new-custom-exception.
So, the realm of exceptions is much wider than you first thought.
Signals
A signal is a notification to a process that an event occurred. Signals are sometimes described as software interrupts. Signals are analogous to hardware interrupts in that they interrupt the normal flow of execution of a program; in most cases, it is not possible to predict exactly when a signal will arrive. They are defined in the C standards and extended in POSIX, but many other programming languages/systems provide access to them as well.
You are more-or-less correct about signals.
My understanding : An interrupt (hardware interrupt) occurs asynchronously generally been caused by an external event directly interrupting the CPU. The CPU will then vector to the particular ISR to handle the interrupt.
Obviously an ISR cannot have a return value or have parameters passed because the event happen at anytime at any point of execution in our code.
With exceptions however, my understanding is that this is a software interrupt which is caused by a special instruction pd within the software.
I've heard that exceptions are handled in a similar fashion to handling an ISR. Can an exception handler in that case behave differently to an ISR , by taking arguments from the code and return a value, because we know where we were in our code when it was executed?
Thanks in advance
A hardware exception is not a software interrupt, you do not explicitly call it - it occurs on some hardware detectable error such as:
invalid address
invalid instruction
invalid alignment
divide-by-zero
You can of course write code to deliberately cause any of these and therefore use them as software interrupts, but then you may loose the utility of them as genuine error traps. Exceptions are in some cases used for this purpose - for example in a processor without an FPU on an architecture where and FPU is an option, the invalid instruction handler can be used to implement software emulation of an FPU so that the compiler does not need to generate different code for FPU and non-FPU variants. Similarly an invalid address exception can invoke a memory manager to implement a virtual memory swap-file (on devices with an MMU).
A software interrupt is explicitly called by an SWI instruction. It's benefit over a straightforward function call is that the application does not need to know the location of the handler - that is determined by the vector table, and is often used to make operating system or BIOS calls in simple operating systems can dynamically load code, but that do not support dynamic-linking (MS-DOS for example worked in this way).
What hardware interrupts, software interrupts and exceptions all have in common is that they execute in different processor context that normal code - typically switching to an independent stack and automatically pushing registers (or using an alternate register bank). They all operate via a vector table, and you cannot pass or return parameters via formal function parameter passing and return. With SWI and forced-exceptions, it is possible to load values into specific registers or memory locations known to the handler.
The above are general principles - the precise details will vary between different architectures. Consult technical reference for the specific device used.
The term "exception" can mean completely different things.
There are "software exceptions" in the form of exception handling, as a high-level language feature in languages like C++. An "exception handler" in this context would be something like a try { } catch block.
And there are "hardware exceptions" which is a term used by some CPU cores like PowerPC. These are a form of critical interrupts corresponding to an error state. An "exception handler" in this context would be similar to an interrupt vector table, although when a hardware exception occurs, there is usually nothing the software can do about it.
Hardware exceptions take no arguments and return no data, just like interrupts. Architectures like PowerPC separate hardware exceptions from hardware interrupts, where the former are various error states, and the later are interrupts from the application-specific hardware.
It isn't all that meaningful for a hardware exception to communicate with the software, as they would be generated from critical failures like wrong OP code executed, CPU clock gone bad, runaway code etc etc. That is, the execution environment has been compromised so there is nothing meaningful that the software executing in that environment can possibly do.
From Computer Organization and Design, by Patterson et al
Why is "I/O device request" external interrupt?
Does "I/O device request" mean that a user program request I/O device services by system calls? If yes, isn't a system call an internal exception?
Thanks.
It's referring to peripheral devices signaling that they require attention, eg. disk controller hardware that is now ready to satisfy a read request that it received earlier, (or has finished DMAing in data for the read request).
The path in to the operating system is an array of pointers. This carry may have different names depending upon the system. I will call it the "dispatch table." The dispatch table handles everything that needs the attention of the operating system: Interrupts, faults, and traps. The last two are collectively "exceptions".
An exception is caused by executing an instruction. They synchronous.
An interrupt is as caused by by something occurring outside the executing process/thread.
A user invokes the the operating system synchronously by executing an instruction that causes a trap (On intel chips they misname such a trap a "software interrupt"). Such an even is a synchronous, predictable result of the instruction stream.
Such a trap would be used to queue an I/O request to the device. "Invoke the operating system from user program" in your table.
The device wold cause an interrupt when the request is completed. That what is meant by an "I/O Device Request" in your table.
The confusion is that interrupts, faults and traps are all handled the same way by the operating system through the dispatch table. And, as I said, in Intel land they call both traps and interrupts "Interrupts".
Because the interrupt isn't generated by the processor or the program. It is a physical wire connected to the interrupt controller whose state changes. Driven by the controller for the device, external to the processor. The interrupt handler is usually located in a driver that knows how to handle the device controller's request for service.
"Invoke the operating system" is a software interrupt, usually switches the processor into protected mode to handle the request.
"Arithmetic overflow" is typically a trap that's generated by the floating point unit on the processor.
"Using an undefined instruction" is another trap, generated by the processor itself when it can't execute code anymore because the instruction is invalid.
Processor usually have more traps like that. Like division by zero. Or executing a privileged instruction. Or a page fault when virtual memory isn't mapped to physical memory yet. Or a protection fault when the program reads an unmapped virtual memory address.
I am working on a MIPS32 like CPU and I am wondering how the MIPS32 exception and interrupt handling works exactly. The MIPS32 Privileged Resource Architecture guide doesn't give much information. I am wondering about several things which are:
What happens if there is an exception or interrupt in an exception or interrupt handler?
MIPS32 has 5 hardware interrupts and 2 software interrupts in the cause register. Are the software interrupts exceptions or are exceptions just shown in the exception code value?
Is there a different interrupt and exception vector?
What happens if there are 2 exceptions that go off in the pipeline before it clears itself for the exception? For example there is an overflow exception followed by another exception, and an interrupt. What happens?
Links to any useful resources will be appreciated.
Exception handlers should not re-enable exceptions until after they have saved EPC, SR etc.
The software interrupts are exceptions.
Some MIPS CPUs have been built with different interrupt and exception vectors, but this turns out not to be very useful.
MIPS has precise exceptions: i.e. exceptions appear in instruction sequence and only the first exception in the pipeline will be architecturally visible.
See MIPS Run Linux is the best and most readable reference for MIPS exceptions and the MIPS PRA.
When I was searching for a distinction between Exceptions and Interrupts,
I found this question Interrupts and exceptions on SO...
Some answers there were not suitable (at least for assembly level):
"Exception are software-version of an interrupt" But there exist software interrupts!!
"Interrupts are asynchronous but exceptions are synchronous" Is that right?
"Interrupts occur regularly"
"Interrupts are hardware implemented trap, exceptions are software implemented" Same as above!
I need to find if some of these answers were right , also I would be grateful if anyone could provide a better answer...
Thanks!
Interrupts are typically a method of signaling a change in hardware state. Peripherals will be tied by electrical signal to an interrupt controller which prioritizes and assigns address vectors to each possible signal. the interrupt controller forwards a detected interrupt condition to the CPU which may or may not 'interrupt' its present execution state to process the signaled state change (depending on whether interrupts are enabled and/or whether this particular input is non-maskable). Interrupt conditions may, on some architectures, be initiated by software (such as on the x86 there is an int mnemonic) in addition to hardware input.
Exceptions span a greater range of implementation. In some CPU architectures such as 68K, an exception can be similar to an interrupt but is generated by some CPU state that needs to be handled. For example there are conditions such as divide by zero, illegal instruction, I/O bus timeout, etc. that generate exceptions. By handling those exceptions one can do things such as emulate instructions and virtually extend the instruction set.
Exceptions may also be a software-only concept such as in the C++ language where certain error conditions can be trapped and handled.
So in general, the statements you are trying to find the validity of may be true or false depending on the exact platform you are applying them to.
An exception as it is used most often is a form of control flow in a programming language to deal with events outside the normal logic flow of the program to avoid that the business logic of a program drowns in the error handling logic. The 'handling' of the exception is context specific. It is more like a kind of GoTo for a number of use-cases where it was useful.
An interrupt is a hardware assisted 'trap' to trigger certain actions when certain events occur, as a timer tick or program "calling" INT21. There is a handler registered which does something predefined.
Both may or may not be synchronous or asynchronous.