Question 2
A logic circuit is given two 2-bit binary numbers A and B as its inputs. The circuit consists of two outputs Y1 and Y2. The output values of YI and Y2 are obtained as follows:
If A<B, then Y1 and Y2 will be equal to A-B. Else Y1 and Y2 will be equal to A
a) Determine the truth table for the system
b) Obtain the simplified:
i SOP for Y1 and Y2.
ii. POS expressions for YI
Truth Table:
A1 A2 A B1 B2 B A<B? Y1=Y2=A-B||A Y11-Y21 Y12=Y22 Y13=Y23
0 0 0 0 0 0 n 0 0 0 0
0 0 0 0 1 1 y -1 1 1 1
0 0 0 1 0 -1 n 0 0 0 0
0 0 0 1 1 -2 n 0 0 0 0
0 1 1 0 0 0 n 1 0 0 1
0 1 1 0 1 1 n 1 0 0 1
0 1 1 1 0 -1 n 1 0 0 1
0 1 1 1 1 -2 n 1 0 0 1
1 0 -1 0 0 0 y -1 1 1 1
1 0 -1 0 1 1 y -2 1 1 0
1 0 -1 1 0 -1 n -1 1 1 1
1 0 -1 1 1 -2 n -1 1 1 1
1 1 -2 0 0 0 y -2 1 1 0
1 1 -2 0 1 1 y -3 1 0 1
1 1 -2 1 0 -1 y -1 1 1 1
1 1 -2 1 1 -2 n -2 1 1 0
Y11-Y21 K-MAP (Karnaugh map):
A1A2\B1B2 0 0 0 1 1 1 1 0
0 0 0 1 0 0
0 1 0 0 0 0
1 0 1 1 1 1
1 1 1 1 1 1
Y11-Y21 Sum Of Products:
A1 V (A1' ^ A2' ^ B1' ^ B2)
Y11-Y21 Product Of Sums:
(A1 v A2')^(B1' v A1)^(A1 v B1 v B2)
The rest is left was an exercise or for another Answerer.
Related
I have a bar chart question here. Given that for all the variables in the dataset 1 = yes and 0 = No. I would like to plot a bar graph with the percentages (where var=1) on the y-axis and the variables on the x axis. Thanks in advance.
Dataset
Water
Ice
Fire
Vapor
1
1
0
1
1
0
0
1
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
1
1
1
0
1
0
1
0
1
1
1
1
0
1
1
0
1
0
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
1
1
0
1
0
1
1
0
1
1
1
0
1
0
1
1
0
1
1
0
0
1
0
1
1
1
1
1
0
1
1
0
0
1
0
1
1
1
The percent of 1s in a (0, 1) variable is just the mean multiplied by 100. As you probably want to see the percent as text on the graph, one method is to clone the variables and multiply each by 100.
You could then use graph bar directly as it defaults to showing means. I don't like its default in this case and the code instead uses statplot, which must be installed before you can use it.
* Example generated by -dataex-. For more info, type help dataex
clear
input byte(water ice fire vapor)
1 1 0 1
1 0 0 1
0 1 1 1
1 1 1 1
1 1 0 1
1 1 1 0
0 1 1 1
0 1 0 1
0 1 1 1
1 0 1 1
0 1 0 0
0 1 1 0
1 0 1 0
1 0 1 0
1 1 1 1
0 1 0 1
1 0 1 1
1 0 1 0
1 1 0 1
1 0 0 1
0 1 1 1
1 1 0 1
1 0 0 1
0 1 1 1
end
quietly foreach v of var water-vapor {
clonevar `v'2 = `v'
label var `v'2 "`v'"
replace `v'2 = 100 * `v'
}
* ssc install statplot
statplot *2 , recast(bar) ytitle(%) blabel(bar, format(%2.1f))
Try
. ssc install mylabels
checking mylabels consistency and verifying not already installed...
all files already exist and are up to date.
. sysuse nlsw88, clear
(NLSW, 1988 extract)
. mylabels 0(10)70, myscale(#/100) local(labels)
0 "0" .1 "10" .2 "20" .3 "30" .4 "40" .5 "50" .6 "60" .7 "70"
. graph bar (mean) married collgrad south union, showyvars legend(off) nolabel bargap(20) ylabel(`labels')
. table, statistic(mean married collgrad south union)
------------------------------
Married | .6420303
College graduate | .2368655
Lives in the south | .4194123
Union worker | .2454739
------------------------------
This relies on mylabels, and implements the bar gap (which I also like).
This is the webpage I am scraping: http://laxreports.sportlogiq.com/nll/GS2200.html
Below is the code for the spider I created:
import scrapy
class MatchesSpider(scrapy.Spider):
name = 'matches'
allowed_domains = ['laxreports.sportlogiq.com']
start_urls = ['http://laxreports.sportlogiq.com/nll/GS2200.html']
def parse(self, response):
tables = response.xpath('//table')
print(tables)
table = tables[0].xpath('//tbody')
I see 22 tables that have been selected for this XPath expression but my problem is that I don't fully understand how to select each individual table and extract its contents.
I am a beginner in scrapy and after searching online for a solution all I see is how to select the tables using the class or ID which in this case is not an option.
You can do that using only pandas
Code:
import pandas as pd
dfs = pd.read_html('https://laxreports.sportlogiq.com/nll/GS2200.html')
df = dfs[10]#.to_csv('d.csv', index = False)
print(df)
Output:
0 1 2 3 4 5 6 7 8 9 10 11 12
0 # Name G A +/- PIM S SOFF LB T CT FO TOF
1 2 W.Malcom 0 0 0 0 1 1 1 4 0 - 11:28
2 3 T.Edwards 0 0 -2 2 0 0 8 1 2 7-18 20:28
3 4 J.Sullivan 0 0 -3 2 0 0 3 0 0 - 15:29
4 11 T.Stuart 0 0 -3 0 0 0 4 1 1 - 21:09
5 14 W.Jeffrey 0 1 -1 0 0 0 9 2 1 - 19:17
6 16 R.Lee 2 1 2 0 9 4 6 6 1 - 23:13
7 17 C.Wardle 2 0 1 2 5 3 4 2 2 - 20:55
8 18 R.Hope (A) 0 0 -2 2 0 0 11 0 0 - 22:02
9 20 J.Ruest 3 2 3 0 8 1 3 2 0 - 24:16
10 23 J.Gilles 0 0 -1 0 0 0 4 0 3 - 14:44
11 27 S.Carnegie 0 0 -1 0 0 0 3 0 0 - 12:19
12 37 D.Coates (C) 0 0 0 0 1 0 1 0 0 1-1 2:31
13 51 E.McLaughlin 0 5 2 0 7 3 5 7 0 - 21:41
14 55 D.Kinnear 0 1 2 0 2 0 2 1 0 0-2 10:14
15 67 K.Killen 1 1 0 0 6 1 4 2 0 - 16:42
16 82 J.Cupido (A) 0 1 -1 0 3 0 4 1 0 - 20:52
17 86 J.Lintz 0 1 -1 0 0 0 4 0 1 - 19:26
18 30 T.Carlson 0 0 NaN 0 0 0 0 0 0 - NaN
19 45 D.Ward 0 0 NaN 0 0 0 0 1 0 - NaN
20 NaN Totals: 8 13 NaN 8 42 13 76 30 11 8-21 NaN
A combinational circuit is to be designed that counts the number of occurrences of 1 bits in a 4 bit input. However, an input 1111 is an invalid input for the circuit and output in such case will be 00.
One valid input for such circuit may be 1110 with the output 11; another valid input may be 1010 with the output 10.
Draw the truth table for the circuit. Use the Karnaugh map to design the circuit and draw it using AND,OR and NOT gates.
Because the 4bit input can have at most 4 ones in it, we can encode the output into 3bit long binary number.
The truth-table would look like this:
w x y z y_2 y_1 y_0
---------+------------- number of positive bits
0 0 0 0 | 0 0 0 ~ 0
0 0 0 1 | 0 0 1 ~ 1
0 0 1 0 | 0 0 1 ~ 1
0 0 1 1 | 0 1 0 ~ 2
---------+-------------
0 1 0 0 | 0 0 1 ~ 1
0 1 0 1 | 0 1 0 ~ 2
0 1 1 0 | 0 1 0 ~ 2
0 1 1 1 | 0 1 1 ~ 3
---------+-------------
1 0 0 0 | 0 0 1 ~ 1
1 0 0 1 | 0 1 0 ~ 2
1 0 1 0 | 0 1 0 ~ 2
1 0 1 1 | 0 1 1 ~ 3
---------+-------------
1 1 0 0 | 0 1 0 ~ 2
1 1 0 1 | 0 1 1 ~ 3
1 1 1 0 | 0 1 1 ~ 3
1 1 1 1 | 1 0 0 ~ 4
BUT! The output in your case is only on two bits. Your specification also consider the 1111 input as invalid with 00 output. therefore you can simply delete the most significant column in the truth table and there will be no other change:
w x y z y_1 y_0
---------+--------- number of positive bits
0 0 0 0 | 0 0 ~ 0
0 0 0 1 | 0 1 ~ 1
0 0 1 0 | 0 1 ~ 1
0 0 1 1 | 1 0 ~ 2
---------+-------------
0 1 0 0 | 0 1 ~ 1
0 1 0 1 | 1 0 ~ 2
0 1 1 0 | 1 0 ~ 2
0 1 1 1 | 1 1 ~ 3
---------+-------------
1 0 0 0 | 0 1 ~ 1
1 0 0 1 | 1 0 ~ 2
1 0 1 0 | 1 0 ~ 2
1 0 1 1 | 1 1 ~ 3
---------+-------------
1 1 0 0 | 1 0 ~ 2
1 1 0 1 | 1 1 ~ 3
1 1 1 0 | 1 1 ~ 3
1 1 1 1 | 0 0 ~ invalid, showing zeros
Now you can use different styles for minimizing the output functions y_1 and y_0, but I think the Karnaugh maps are suitable for this.
Transfer the lines of the truth-table for each of the output functions into a separate K-map using the indexes (number of line in the table indexed from zero) or comparing the combinations of the variables.
For the output function y_0 the final K-map looks like this and as you can see that is the minimized SOP (DNF; disjunction of conjunctions) function with no larger groups (terms) to be found.
y_0 = ¬w·¬x·¬y·z + ¬w·x·¬y·¬z + ¬w·¬x·y·¬z + ¬w·x·y·z
+ w·¬x·y·z + w·x·y·¬z + w·¬x·¬y·¬z + w·x·¬y·z
For the most significant bit of the output I chose to find the POS (CNF; conjunction of disjunctions), because there are fewer cases of 0 bits than 1 bits in the output.
The output function can be as well as in the y_0 described by marking out all the right bits. In this case it would be this K-map and the function:
y_1 = (w + x + y + z) · (w + x + y + ¬z) · (w + ¬x + y + z)
· (w + x + ¬y + z) · (¬w + ¬x + ¬y + ¬z) · (¬w + x + y + z)
But that can be minimized to this output function in the K-map:
y_1 = (w + x + y) · (w + y + z) · (w + x + z)
· (¬w + ¬x + ¬y + ¬z) · (x + y + z)
After that you can just use the right gates or transform it to more suitable combination of gates using Rott's grids.
we are searching for the simplest implementation of this boolean logic function :
you can only use this logic elements : AND,OR,NOT,XOR.
thanks in advance.
Assuming this is the required truth table:
A B C D X
0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 1
1 0 1 0 1
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
Then this seems to be the best implementation:
X = (A^B).(C^D) + (A'.B').(C^D)'
Could someone please help me understand what the boolean equation performed by this circuit would be?
Label the output of the first mux X.
Then, create a truth table for X, then Y:
C D X A Y
---------
0 0 1 0 1
0 1 0 0 0
1 0 0 0 0
1 1 1 0 1
0 0 1 1 1
0 1 0 1 1
1 0 0 1 1
1 1 1 1 1
From inspection of the truth table:
Y = A + CD + C'D'