Why is the default value 0x1000 instead of 0x200? - binary

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From the manual , in Bits 12-8 , the default value is 0x10 , meaning that only Bit 9 is 1.
From the calculator it shows b10 0000 0000 = 0x200. But why does the document say its 0x1000 instead?

Each hexadecimal digit corresponds to 4 bits (a.k.a. a nibble). In the number 0x10, only bit 5 is 1.
The correct conversion is this:
0x10 --> 1 0
0001 0000 --> 0b10000

Related

How translate MIPS I-format to binary?

I don't know how to translating mips I-format instruction to binary.
For example,
$t0 is base of an int array A[].
And the way to get value of A[1] is
lw $t0, 4($t0) // 4 means 4bytes
35(6bits) | 8(5bits) | 8(5bits) | 4(16bits)
10011 / 00101 / 01000 / 0000 0000 0000 0100
Is it correct?
and
bne $t0, $s0, Exit <- 80000
// other instruction1 <- 80004
// other instruction2 <- 80008
Exit: <- 80012
5(6bits) | 8(5bits) | 16(5bits) | 2(16bits)
00101 / 01000 / 10000 / 0000 0000 0000 0010
Pointer counter points instruction1(80004).
And address is byte address.
Is correct?
I know address in BNE is instruction distance between Program Counter.
I am confused why address in BNE is 2, not 8.
lw $t0, 4($t0) // 4 means 4bytes
35(6bits) | 8(5bits) | 8(5bits) | 4(16bits)
Yes
10011 / 00101 / 01000 / 0000 0000 0000 0100
No
100011 / 01000 / 01000 / 0000 0000 0000 0100
bne $t0, $s0, Exit <- 80000
5(6bits) | 8(5bits) | 16(5bits) | 2(16bits)
Yes
00101 / 01000 / 10000 / 0000 0000 0000 0010
Close
000101 / 01000 / 10000 / 0000 0000 0000 0010
(Make sure there's actually 6 digits in your 6-bit fields.)
With MIPS, all instructions are 32 bits wide, or 4 bytes long, and each instruction starts at an even 4 byte boundary (4 byte or word aligned, even multiple of 4).  Thus, for a branch, it is going from a 4 byte aligned address to another 4 byte aligned address.
A 4-byte aligned address has 2 low bits of zero.  The branch offset is the difference between 2 4-byte aligned addresses, and therefore such an offset also has 2 low bits that are zero.  There's no point in encoding those two zero bits in the instruction because it is known they're zeros.  So, the immediate encoded in the branch instruction is the branch offset divided by 4, which removes those zero bits, and also increases the branch offset's range by 2 bits.  (The assembler divides the offset by 4 to encode it and the hardware effectively multiplies the immediate by 4 in usage.)

MIPS instruction modulo

b = a % 16
a --> $s0
b --> $s1
Answer: $s1, $s0, 0xF
#0xF= 0000 0000 0000 0000 0000 0000 0000 1111
When I convert it to decimal, it is 15.
I am not too sure why it is 15?
The remainder when dividing any number by b is in the range [0, b-1]. So modulo 16 returns a maximum value of 15
To get modulo 2N of any number we take the last N bits of it, because any higher bit at position M with M > N represents a value 2M which is divisible by 2N. The mask to get N bits is 2N - 1. That means a % 16 = a & 0xF = a & 15
When using the MIPS command div for division, the result is stored in the register lo while the modolo is stored in the register hi.
So if a=$s0, b=$s1 and $t0 = 16 you could use
div $s0,$t0
mfhi $s1
for b=a%16

Possible to move Program Counter to a far-off memory address immediately?

I'm trying to adapt a program that counts the occurrences of a char in a file to store a list of the hex addresses where the matches occurred in a far-off memory location. Code:
011 0000 0000 0000 ;Codes x3000 as Load-address of program
0101 010 010 1 00000 ;R2 <- 0
0010 011 000010000 ;R3 <- M[x3012]
1111 0000 0010 0011 ;TRAP x23 (Loads INPUT into R0)
0110 001 011 000000 ;R1 <- M[R3]
;LOOP BEGINS HERE
0001 100 001 1 11100 ;R4 <- R1 - EOT
0000 010 000001000 ;If above = 0, exit loop
1001 001 001 111111 ;R1 <- NOT R1
0001 001 001 1 00001 ;R1 <- R1 + 1
0001 001 001 0 00 000 ;R1 <- R1 + R0
0000 101 000000001 ;If above != 0, do NOT increment counter
0001 010 010 1 00001 ;R2 <- R2 + 1 (increment counter)
0001 011 011 1 00001 ;R3 <- R3 + 1 (increments pointer to next char in file)
0110 001 011 000000 ;R1 <- M[R3] (loads next char into R1)
0000 111 111110110 ;BRnzp x3004 (unconditionally RETURN to loop start)
;LOOP ENDS HERE
0010 000 000000100 ;R0 <- M[x3013]
0001 000 000 0 00 010 ;R0 <- R0 + R2
1111 0000 0010 0001 ;TRAP x21 (OUTPUT)
1111 0000 0010 0101 ;TRAP x25 (HALT)
0011 0001 0000 0000 ;Codes x3100 for the starting address of the file
0000 000 000110000 ;ASCII template
So my program starts at memory address x3000. I want to begin the set of instructions that will handle the list at x300B (below the "increment R2" instruction). Trouble is, I want to start the list at x3500, and I don't know of an "efficient" way to get there.
My original plan was to use a Load Indirect (LDI) instruction, but because of sign-extension, the 9-bit offset only allows an offset of at most x00FF = 0000 0000 1111 1111, which only takes me from x300C (x300B with program counter incremented) to x310B.
The only real "workaround" I've come up with is to use a Load Effective Address (LEA) instructions to store the address x310B in a register (say R5), then store the value x00FF in R6, and repeatedly add R6 to R5 until I get to x3408 (that would take 3 ADD instructions), at which point I'd store the value x0092 in R6, add that to R5, and I'd FINALLY have x3500 in R5.
At that point, the rest is trivial (store R3 in (R5 + counter), which would put the address of the current match into the appropriate "spot" on the list)
I haven't actually done this yet because the whole method of getting to x3500 I described above seems really cumbersome and clumsy. I can't shake the feeling that there has to be a better, faster way to move that many memory addresses at the same time.
Is it possible to move from x300C to x3500 in a single instruction? Even two would be better than what I've currently got.
You wouldn't want to do that, it is possible but a simpler method would be to use LD (opcode 0010) and LDR (opcode 0110) to do this. No need to have the PC jump to x3500 (which would start executing the data in your array which is bad)
Have an address contain the bits 0011 0101 0000 0000
Opcode 0010 will allow you to pull the x3500 into a register. Opcode 0110 will then allow you to load values from your array.

Binary Subtraction Borrowing Logic for 1000 - 0110?

I am having a hardtime understanding the borrowing logic for 1000 - 0110 . I know the answer would be 0010 but I am having trouble understanding the borrowing part a little.
First Step is Ok 0 - 0 = 0
1000
0110
----
0
Second Step 0 - 1 , so we need to borrow . We borrow 1 and as result 10 - 1 = 1
->1
1000
0110
----
10
But at the next step there is nothing to borrow, so how does it work ?
When you borrow, you carry over binary 10 to the lower bit, so:
0
->1
0000
0110
----
0
Then you borrow again, and subtract 1 from 10, which is 1:
0
->11
0000
0110
----
0
And finally:
0
->11
0000
0110
----
0010
In computer, number will be presented as 2 parts: sign bit and value bits. a - b will be performed as a + (-b)
for positive number, its sign part is 0, value part is its binary representation. For your case, it's: 0 1000
for negative number, its sign part is 1, value part is: ~number + 1, for 0110, ~a is 1001, +1, the representation is : 1 1010
0 1000
1 1010
=======
0 0010
it is positive number 2

How can 1111 1111 be the two-s complement representation of -1?

My book says that to get the two's-complement representation, to just flip the bits and add 1. Correct me if I am wrong but the binary representation of -1 would be:
1000 0001
The MSB 1 denotes the sign (1 being negative number) and the 1 at the very end is where the 1 comes from.
So when I flip the bits:
0111 1110
So why does my book say that the two's complement representation of -1 is 1111 1111? I assume I am messing up somewhere.
The book has right. 1111 1111 is the representation of -1 in two's complement.
Try add one to 1111 1111. The result is:
1111 1111 +
0000 0001
---------
1 0000 0000
The "one" at the beginning of the result is the "carry bit". The result is your answer: 0.
At first glance you would say that overflow has occurred, but not at this time, because the result (the zero) can be represented on 8 bits.
One more example:
If you add -1 to -1 then you should get -2:
1111 1111 +
1111 1111
---------
1 1111 1110
And so on...
So why does my book say that the two's complement representation of -1 is 1111 1111?
It's because the MSB is negative and the rest is positive:
1111 1111 = -128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 => -1
If you flip the bits of 1111 1111 you would get 0000 0000 if you add one then its 0000 0001 = 1 but that would be -1. Conversely if you want to represent -1 then think of it in reverse. 1 is represented 0000 0001 subtract 1 => 0000 0000, then flip it => 1111 1111. And -2 from above. 2 => 0000 0010. Subtract 1 => 0000 0001, flip it => 1111 1110.