I am struggling to understand what this block of mips instruction does. I want to find out what the register $t0 has after these instructions.
ori $t0 $zero 0xA5C11000
addi $t1 $zero 0x10010000
sw $t0 ($t1)
lb $t0 1($t1)
sh $t0 2($t1)
lw $t0 ($t1)
I know that the registers $t0 and $t1 have A5C11000 and 10010000 in them. Then the sw command stores $t1 at the location of $t0. Lb then offsets $t1 by 1 and stores that at the location 10010001? I don't know what happens after this.
Not quite: sw stores the contents of $t0 at the address in $t1, i.e. 10010000. lb loads a byte from address $t1 + 1 into $t0. sh stores a halfword (the lower 2 bytes of $t0) at address $t1 +2.
Try stepping through the code in the debugger to see what it does.
Related
Here are the MIPS code:
Loop: lw $t0, 0($s1) # $t0=array element
addu $t0, $t0, $s2 # add scalar in $s2
sw $t0, 4($s1) # store result
addi $s1, $s1,–4 # decrement pointer
bne $s1, $zero, Loop # branch $s1!=0
After scheduling, we can pack them like below:
Why addi instruction can move before the sw instruction?
They both use the $s1 register.
Before scheduling in the first iteration,we will get 0($s1)-> $t0, 4($s1)<- $t0+$s2.
However the scheduling result may be 0($s1)-> $t0, 0($s1)<- $t0+$s2
There are obviously different.
What I guess there is a magic in pipeline.
I don't know what the name is,so I call it "anti-data hazard".
Since addi instruction will write back in the 5th stage(WB), we could use the data hazard to make the sw instruction get the old data address($s1) in stage3.
(sw instruction will not trigger forwarding)
Is my guess right?Please tell me.
Loop: lw $t2, 0($t1)
add $t3, $t2, $s1
sw $t3, 4($t1)
add $t1, $t1, $t9
bne $t1, $t0, Loop
and $s2, $s4, $s5
I have interpreted that stall takes place in second instruction provided that this loop runs 8 times and we are in third iteration. Can stall take place in any more situation?
have a really basic question here.
Can a register have both a value and an address. As in assuming i want to swap between values: 5 stored in t0 and 7 stored in t1
does this code work:
sw $t0, 0($t0)
sw $t1, 0($t1)
lw $t1, 0 ($t0)
lw $t0, 0 ($t1)
Sorry this might sound stupid
Not really for all values, as sw and lw need proper alignment (valid addresses should be multiple of 4).
That is, your code would only work for values multiple of 4, and anyways it would be a bad idea to do so, because you would be basically write garbage on whichever address you are pointing at.
To swap registers without overwriting a third register you can use the following trick:
xor $t0, $t0, $t1
xor $t1, $t0, $t1
xor $t0, $t0, $t1
The block of code starting from jal next is given in the question, so it can't be changed (have to give intermediate memory and register states after each instruction). The program terminates at the error line with the mesage Runtime exception at 0x00400054: Cannot read directly from text segment!0x00400074' I think the line is supposed to load the value of memory location x200040054 to $t0. I tried manually entering the memory and register values and removing the first block of code to get a different program count when the line with the error executes, but get the same error.
.text
li $t2, 0x0012b628
li $t3, 0x01234567
li $t4, 0xfedcba98
li $t5, 0xf0f0f0f0
sw $t2, 0x10000000
sw $t3, 0x10000004
sw $t5, 0x1000000C
li $a0, 0x000007de
li $t0, 0x52f123d6
li $t1, 0xffffffff
li $s0, 0x10000000
jal next
next : lw $t0 , 0x20($31) #line with error
andi $t1 , $t0 , 0x07C0
xor $t0 , $t0 , $t1
lw $t1 , 0($s0)
andi $t1 , $t1 , 0x07C0
or $t0 , $t0 , $t1
srl $t1 , $t1 , 6
sw $t0 , 0x20($ra)
sll $a0 , $a0 , 31
li $v0, 10
syscall
You are getting a runtime exception because the code you are running is trying to read and the write the text segment (the memory which holds the program code) and usually you cannot read/write those portions of memory at runtime.
The line of code that is giving you the exception is trying to put into register $t0 the contents of the instruction located 8 instructions ahead of $ra which at that moment should point to the location of instruction lw $t0 , 0x20($31) #line with error, that is the binary representation of instruction sll $a0 , $a0 , 31
Then, after some bit manipulation it tries to change the instruction sll $a0 , $a0 , 31 with some other instruction, apparently with sll $a0 , $a0 , 24
Assuming we have something of this sort in MIPS
jal F
F: lw $t1, 0($ra)
lw $t2, 8($ra)
What would we have in $t1 and $t2?
Will $t1 have the instruction code of F??
Say X is the address of label F
when jal is called $ra will hold X
you load what is on $ra to $t1 which is the binary machine laguage of the instruction at X
then you load what is 2 words lower (8) which is here not specified in your code, you need to show a 4th line of code to tell you =)