Just starting out in mips and having a little trouble with one concept. Let's say I want to take this and put it into mips
char *number = "one";
How would I implement that? Thanks.
You define the variable in the .data section
number: .asciiz "one"
and if you want the base address of it you store it in $t0 with a load address instruction
la $t0, number
and you can load the word, byte, or halfword into $t1 with a load instruction like this
lw $t1, 0($t0)
where the 0 is the offset from the base address
Related
I just have this conceptual question but I can't really find sites that give clear explanation.
But for the temporary register, saved registers and floating point registers, do they contain address of the values we desire or just the values, say 100 or 200?
The answer is both. The register can contain an address when used with a lw instruction like this:
lw $t1, 0($t2) # loads the value at address 0+$t2 into $t1
Other instructions involve registers which contain values:
add $t1, $t2, $t3 # loads value of $t2 + value of $t3 into $t1
I am working with MIPS Assembly in the Mars simulator and I am attempting to set it up so that I can enter any 2-digit number (ex: 24) into the Keyboard and Display MMIO Simulator and then take it from MMIO addresses and put it into my registers for manipulation. This technique will use polling, which I understand to some degree.
I can load individual characters and place their ascii value into my registers using the following code (inside .text):
main:
lui $t0, 0xFFFF #$t0 = 0xFFFF0000
poll: # polling procedure
lw $t1, 0($t0)
andi $t1, $t1, 0x0001
beq $t1, $zero, poll
lw $a0, 4($t0) # load word into register $a0
Is it possible in this case for MMIO to treat the input as an immediate and to take in two at once? If not, then are there any known workarounds to this? Thanks.
For example:
$t0 = A
$t1 = B
$t2 = C
If I do the following command
lw $t1, 4($t0)
would it load $t2 into $t1?
As long as your temporary registers are next to each other in memory.
i.e.
Reference: $t1 $t2
Mem Blocks: [byte][byte][byte][byte][byte][byte][byte][byte]...
Programs like Logisim should have the registers packed tightly.
Helpful page here from UC Berkeley.
If I do the following command
lw $t1, 4($t0)
would it load $t2 into $t1?
No, it would not. The lw instruction is used to load data from memory, not to copy the value of one register into another register. To quote from the MIPS manual:
LW rt, offset(base) MIPS32 (MIPS I)
Purpose:
To load a word from memory as a signed value
Description: rt ← memory[base+offset]
The contents of the 32-bit word at the memory location specified by the aligned effective address are fetched,
sign-extended to the GPR register length if necessary, and placed in GPR rt. The 16-bit signed offset is added to the
contents of GPR base to form the effective address.
In other words, what lw $t1, 4($t0) does is form an effective address by adding the value of $t0 with the value 4, and load a word (four bytes) from that address into register $t1.
How does 'alignment of memory operands' help MIPS to be pipelined?
The book says:
Fourth, as discussed in Chapter 2, operands must be aligned in memory. Hence,
we need not worry about a single data transfer instruction requiring two data
memory accesses; the requested data can be transferred between processor and
memory in a single pipeline stage.
I think I understand that one data transfer instruction does not require two or more data memory aaccesses.
However, I am not sure what does it have to do with the alignment of memory operands.
Thanks, in advance!
The lw instruction requires that the memory address be word aligned.
Therefore, to access an unaligned word, one would need to access the two word boundaries that the required word intersects and mask out the necessary bytes.
For example, suppose you desire to load a word stored at address 0x2. 0x2 is not word aligned, so you would need to load the half word stored at 0x2 and the half-word stored at 0x4.
To do so, one might write:
lh $t0 2($zero)
lh $t1 4($zero)
sll $t1 $t1 16
or $t2 $t0 $t1
This only gets more complicated if you want to load for example a word stored at address 0x3:
# load first byte
lb $t0 3($zero)
# load second word, mask out first 3 bytes
lw $t1 4($zero)
lui $t2 0x0000FFFF
ori $t2 $t2 0xFFFFFFFF
or $t1 $t1 $t2
# combine
sll $t1 $t1 8
or $t2 $t0 $t1
So, it can be seen that the requirement for word alignment doesn't help MIPS to be pipelined, but rather that access to unaligned words requires excess memory accesses — this is a limitation of the ISA.
I have a function that takes a memory address as $a0 and I access the (variable) number of words by using x($a0), where x is multiples of 8. I need to store these in the $sp register so I can use the $a0 register for passing arguments to other functions. Completely new to MIPS assembly, so any pointers here would help!
Multiples of 8 i assume you are using mips-64
first u make a loop and increment a0 by 8 each time:
loop: lw $t0, 0($a0) ;fetch data and store in t0
addi $sp,$sp,-8 ;increase stack
sw $t0, 0($sp) ;store data fetched
addi $a0,$a0,8 ;increment a0 to go to next entry
;here you check that you haven't reached x yet
;let's say 8*x+$a0(initial) is stored in $t1 (this is easy to do just use sll by 3 to multiply by 8 then add a0 before loop)
bne $a0,$t1,loop
;now you can use $a0