what is the range of Branch instruction in mips? - mips

So I have this question that say, beq instruction is executing from 0x80000000 address, what is the lowest destination address you can reach.
the answer is 0x7ffe0004, but I couldn't figure out how to get to this result. any help please?

The offset is a 16-bit signed field, ranging from -32768 to +32767. That offset is in words, so it is multipied by 4. The PC will already have been advanced, so the new address is PC + 4 + 4*offset. 4 x 32768 is 0x20000. 0x80000000 + 4 - 0x20000 is 0x7ffe0004.

Related

MIPS Assembler "bne" Branch Address

I am working on an homework assignment which asks to translate the below MIPS instructions (highlighted in blue) into decimal, binary and hex equivalences, as well as to provide the local counter and program counter for each instruction. My answers are below in the white cells right below each instruction.
For the instruction bne $t9, $zero, next, I was told that the branch address is slightly off. Below steps are what I did to arrive at the answer:
Converted the bne opcode into decimal 5 according to the MIPS Green Sheet and then converted to its binary and hex equivalence
Converted the rs ($t9) and rt ($zero) into the decimals 25 and 0 according to the Green Sheet, respectively. Then, I converted them into their binary and hex equivalence.
Converted immediate code for the label "next" using the formula: PC = PC + 4 + BranchAddr. I rearranged the formula to Next Address = Current Address + 4 + Offset Address * 4 and finally to Offset Address = (Next Address - Current Address - 4) / 4. The label "next" is originally located at 0x04. Since the "bne" is currently located at 0x18, it is pointing at the address 0x1C. Thus the offset address is 0x04 (4 x 16 = 4) - 0x1C (1 x 16 + 12 = 28) = -24, the different is divided by 4 which results in -6. The result is then converted to it binary and hex equivalences.
I am not sure what is off here. Any help would be very much appreciated.

MIPS, How do I find the decimal value in the immediate field of instruction

I'm working with MIPS in Mars. If I'm given the address of an instruction, how do I find the decimal value in the immediate field for the instruction.
i.e. beq $t0, $t1, someLabel - at address (in decimal) 08
This form of branch addressing is called PC-relative addressing. Since all MIPS instructions are 4 bytes long, MIPS stretches the distance of the branch by having PC-relative addressing refer to the number of words to the next instruction instead of the number of bytes. Thus, the 16-bit field can branch four times as far by interpreting the field as a relative word address rather than as a relative byte address. Refer to pic attached. (cred:Computer Organisation and Design David & John)
As we can see the address is 80000 (in decimal). So, in PC relative we get the difference of target and next address /4.
For your question We use
Target (decimal) = (immediate*4)+next instruction (address in decimal)
And your answer is
(Target - next instruction)/4 (this is the third value (immediate field) in the beq statement)

MIPS sra Instruction on SPIM

I am currently using SPIM (QTSpim) to learn about MIPS. I had a few questions regarding the SPIM commands and how they work.
1) As far as I know, MIPS usually uses 16 bits to display values, but why do the registers in QTSpim only have 8 bits?
2) For register $11(t3), the original value was 10. After the machine performs a [sra $11, $11, 2] instruction, the value changes from 10 to 4. How does this happen? How are 2 positions shifted right when 10 is only 2 bits?
Thank you.
1) Not sure where you got that idea. QtSpim simulates a MIPS32-based machine, so the general-purpose registers are 32-bit.
2) 10 hexadecimal is 10000 binary. Shift that right by two and you get 100 binary, which is 4 decimal. You can also think of it as 16 decimal divided by 4, since sra by N bits is a (signed) division by 2^N.

Implementing SLR and SLL instructions into MIPS Processor

Given the MIPS Processor design as seen
I was thinking of adding the sll and srl functions to the processor. I can't seem to have any intuition on how I can retrieve the amounts of zeros to append (shift dynamically from the given shamt from [10:6] of the instruction).
Can anyone give me one headstart on this? Thanks!
The answer is a delayed but I hope that someone in the future will find it helpful.
As you mention the bits in the shamt (shift amount) field are 5 (10 -> 6). So, 2**5=32 which corresponds to the number of bits that can be shifted right/left.
Example:
Assuming that we execute a srl (shift right logical) operation and the value in the shamt field is 00010 (2 in
decimal) and the value in the register we want to shift is
00000000000000000000000000010100
The value becomes shifted by 2 00000000000000000000000000000101
Another example:
Instruction = srl (Shift Right Logical)
Shamt field = 11110 (30 in decimal) Register Value = 11110000000000000000000000000000 Result = 00000000000000000000000000000001
The value in the register gets shifted to the right by 30 bits
indicated by the shamt field and becomes 1.
Depending on the value in the shamt field you shift by N bits the register that needs shifting to the right or to the left; logical or arithmetic.

Using MIPS to find sum of array

So Im having trouble with a problem. Im givin that a is an array of words and the base address of a is saved in $a0. So for int a[10] find the sum of this array using mips. I really don't know where to start can someone help me start and I think I should be able to finish it. Thanks a bunch!
Since you are given the address of the start of the array, you know that is also your first element. Since this is an array of int, I will assume it means it will use a storage space the size of a word on mips32 which is 4 bytes. Therefore a[1] is located at the address of a[0]+4bytes. A[2] is located at the address of a[0]+8bytes or a[1]+4bytes etc...
From that it follows that all you have to do is just loop 10 times, loading a word each time and adding the value.
The basic flow is:
Let count = 0, sum = 0 (sum is your return value, so $v0)
Load a word value from $a0 into a register
Set $a0 = $a0 + 4 (move from a[count] to a[count+1], integer is 4 bytes on mips32)
Set sum = sum + the register you loaded the word value into
count = count + 1
if count < 10? (set less than, branch) go to #2
jump and link (assuming our sum is already in $v0)
Note: The base address you are given MUST be word-aligned.
Optimization note: You can optimize the number of instructions executed by setting some register to $a0 + 40 before step 1. This means you can get rid of step 5 and step 6 will be a check if $a0 is less than that register you set before step 1. (The last optimization is moving step 4 to step 6's delay slot. If you are using a simulator, this might not be supported though)